The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 1998

Filed:

Sep. 19, 1996
Applicant:
Inventors:

Edward Carl Fullman, Phoenix, AZ (US);

Richard Brian Nelson, Chandler, AZ (US);

James Richard Kozicek, Mesa, AZ (US);

Richard Alexander Erhart, Chandler, AZ (US);

Assignee:

Vivid Semiconductor, Inc., Chandler, AZ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324765 ;
Abstract

An integrated circuit assembly using tape automated bonding (TAB) reduces the number of TAB test pads formed upon the TAB film, for purposes of testing the integrated circuit prior to surface mounting, by sharing at least some of such test pads between at least two output terminals of the integrated circuit. A control signal indicates to the integrated circuit that a TAB test mode of operation is in effect. A second control signal indicates which of the two output signals should be enabled to the shared test pad during the TAB test mode. Multiplexers are provided at the output terminals, and are responsive to such control signals, for selectively allowing one of such output signals to be conducted to the test pad, while temporarily presenting a high impedance at the other output terminal. A method of testing such integrated circuit assembly includes the step of trimming such test pads from the tape automated bonding film after testing and before surface mounting.


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