The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 1998

Filed:

Apr. 04, 1996
Applicant:
Inventors:

Kazumasa Igarashi, Osaka, JP;

Megumu Nagasawa, Osaka, JP;

Satoshi Tanigawa, Osaka, JP;

Hideyuki Usui, Osaka, JP;

Nobuhiko Yoshio, Osaka, JP;

Hisataka Ito, Osaka, JP;

Tadao Okawa, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257787 ; 257778 ; 257792 ; 528310 ; 528318 ;
Abstract

A semiconductor device capable of preventing the occurrence of defect of electroconductivity, wherein a semiconductor chip 1 equipped with electrodes 11 is mounted on an auxiliary wiring plate 2 in the state of facing the surface of the electrode 11 side, leading conductors 23 are disposed in the inside of the auxiliary wiring plate 2, one end of each leading conductor 23 forms an internal electrode 21 projecting from the surface of the auxiliary wiring plate 2 at the side of mounting the semiconductor chip 1, the other end of the leading conductor 23 forms an external electrode 22 projecting from the surface of the auxiliary wiring plate opposite to the side of mounting the semiconductor chip 1, and each of the internal electrodes 21 is connected to each of the electrodes 11 of the semiconductor chip 1, at least a gap between the semiconductor chip 1 and the auxiliary wiring plate 2 is encapsulated with a heat-welding polyimide resin layer.


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