The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 1998
Filed:
Aug. 18, 1995
Applicant:
Inventors:
Walter F Broedner, Saratoga, CA (US);
Anthony M Fadell, Sunnyvale, CA (US);
Assignee:
General Magic, Inc., Sunnyvale, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395283 ; 395733 ;
Abstract
A low power, single master, variable clock rate, daisy-chainable, serial bus connects a bus dispatch (master) to a chain of one or more daisy-chained peripheral devices (slaves). The bus has a bidirectional serial data line, a bidirectional clock line, unidirectional interrupt line, power and ground lines. Each peripheral device includes a plurality of serial bus support structures. For example, the serial bus support structures can include an interrupt generation circuit, a power-on circuit, and a wake-up interrupt generation circuit, and a wake-up interrupt propagation circuit.