The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 1998

Filed:

Aug. 19, 1996
Applicant:
Inventors:

John Matthew Lauffer, Waverly, NY (US);

Richard Charles Senger, Vestal, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R / ;
U.S. Cl.
CPC ...
174263 ; 361772 ; 439 83 ;
Abstract

A printed circuit board has a plurality of layers. A first surface land is formed on an inner layer. A dielectric material is laminated on the inner layer. A second surface land is formed on the dielectric material overlapping the inner surface land or positioned along the border of the inner surface land. A hole is etched in the dielectric material exposing the first surface land to the second surface land. The second surface land does not completely surround the hole. A component lead is positioned over the second surface land. Solder is reflowed into the hole to interconnect the surface lands to each other and to the component lead. Because the second surface land does not completely surround the hole, the solder does not bridge across the hole and thereby forms a solid connection between the first and second surface lands.


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