Lead frame for a semiconductor device comprising inner leads having a

Abstract

A semiconductor chip package includes a semiconductor chip, a lead frame including a plurality of inner leads each having a wire bonding point on a top surface, bonding wires for electrically interconnecting the semiconductor chip to each of the plurality of inner leads, and a molding compound for encapsulating the semiconductor chip and the inner leads. Each of the plurality of inner leads of the lead frame has a means for locking movement of the molding compound against the top surfaces of the inner leads, and the locking means, for example a linear groove, down set feature of the inner lead or second wire ball, is placed in close proximity to the wire bonding.