The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 1998

Filed:

Oct. 10, 1996
Applicant:
Inventors:

Karim Benkaroun, Sartrouville, FR;

Manuel Lima, Paris, FR;

Alain Gousset, Nanterre, FR;

Assignee:

Schneider Electric SA, Boulogne Billancourt, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01H / ;
U.S. Cl.
CPC ...
361194 ; 361197 ; 361154 ;
Abstract

A power supply circuit, using direct current or rectified alternating current sources having output and return supply lines (a, b), for a coil of an electromagnet having at least one principal winding (B1) and a secondary winding (B2). The power supply circuit includes a first semiconductor element (T2) having a gate and a source drain path and capable of providing or blocking a supply of current to the secondary winding (B2), the source drain path connected between the secondary winding (B2) and the return supply line (b); and a switching means (10) connected between the primary winding (B1) and the gate of the first semiconductor element (T2). The switching means (10) includes a second semiconductor element (T1) having a gate and a source drain path and capable of keeping the first semiconductor element (T2) from conducting when a voltage between the gate of the second semiconductor element (T1) and the return supply line (b) reaches a threshold voltage (Vs) greater than a value (V1) corresponding to a start of a closing of the electromagnet, the source drain path of the second semiconductor element (T1) connected between the gate of the first semiconductor element (T2) and the return supply line (b), and an adaptation circuit connected between the primary winding (B1) and the gate of the second semiconductor element (T1).


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