Semiconductor device having planar junction

Abstract

A highly reliable semiconductor device having a planar junction, which comprises a main junction and a plurality of field limiting ring regions surrounding the main junction, and an electrically floating conductive layer to completely cover that part of the surface of an n.sup.- layer between the main junction and the nearest field limiting ring region thereto through an insulating layer to suppress influences by external factors such as charged particles, etc. In accordance with such a structured device, when a voltage for making the main junction into a reverse bias state is applied, the potential of the conductive layer becomes fixed to an intermediate potential between the main junction and the nearest field limiting ring region thereto and plays a role of shield effect. In fact, even if the device is incorporated into a resin-sealed package and subjected to reliability tests (high temperature DC reverse bias tests), the breakdown voltage is not changed at all. Also, rather than effecting a device in which the conductive layer is electrically floating, the conductive layer which covers an overlying area between the main junction and the nearest field limiting ring region thereto can be electrically connected to the nearest field limiting ring.