The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 1998

Filed:

Nov. 21, 1995
Applicant:
Inventors:

Bertrand Kania, Paris, FR;

Dieter Kopp, Hemmingen, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
711200 ; 711-2 ; 711-6 ; 711-1 ; 711210 ; 711211 ;
Abstract

An interface between a memory that has 'n' address bit inputs and a processor which has 'p' address bit outputs (where p<n) and 'q' programmable data bit outputs (where q.gtoreq.n-p). The interface includes a logic circuit connected to a byte select bit output, to a memory read-write command bit output and to an appropriately programmed one of the 'q' programmable bit outputs of the processor. The logic circuit produces a least significant bit address bit input AI0 defined by the equation AI0=R/W & byte-s OR R/W & I/O0. The interface connects the remaining 'p' address bit inputs of the memory succeeding to the 'p' address bit outputs of the processor, in order, and connects the remaining 'n-p-1' most significant address bit inputs of the memory to the same number of appropriately programmed programmable bit outputs of the processor.


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