Load/store unit implementing non-blocking loads for a superscalar

Abstract

A load/store buffer is provided which allows both load memory operations and store memory operations to be stored within it. Memory operations are selected from the load/store buffer for access to the data cache, including cases where the memory operation selected is subsequent in program order to a memory operation which is known to miss the data cache and is stored in the buffer. In this way, other memory operations that may be waiting for an opportunity to access the data cache may make such accesses, while the memory operations that have missed await an opportunity to make a main memory request. Memory operations that have missed are indicated by a miss bit being set, so that the mechanism which selects memory operations to access the data cache may ignore them until they become non-speculative.