The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 1998
Filed:
Sep. 04, 1996
Carl Donald Wiseman, Austin, TX (US);
Naji Chafic Naufel, Austin, TX (US);
Sang Quan, Austin, TX (US);
Yong Hyon Kim, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
An electronic circuit (100) for reducing electromagnetic interference includes a plurality of circuit elements (130, 140, 150) to which a set of bussed logic signals (343) generated by a set of first circuits (342) is distributed by a logic clock (120). The electronic circuit (100) further includes a plurality of cascaded busses (355, 135, 335) including a last cascaded bus (335) having a last enablement phase. Each of the plurality of cascaded busses (355, 135, 335) couples a set of amplified logic signals (355, 135, 335) from one of the plurality of circuit elements (358, 359, 336) to another one of the plurality of circuit elements (359, 336, 322). The set of amplified logic signals (355, 135, 335) of each of the plurality of cascaded busses is enabled during an enable period (351, 352, 330) which lasts beyond an end of the last enablement phase.