The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 1998

Filed:

Oct. 03, 1996
Applicant:
Inventors:

Robert Dean Adams, Essex Junction, VT (US);

Kevin Arthur Batson, Williston, VT (US);

George Maria Braceras, Calchester, VT (US);

Fred John Towler, Essex Junction, VT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
371 211 ; 371 212 ; 365 49 ; 365201 ;
Abstract

A method of testing a first memory such as a RAM having data storage at a plurality of individually addressable storage locations is provided. A portion of the address for the addressable locations of the first memory is supplied as an output from a second memory such as a CAM. The second memory includes a decoder to provide a decoded address as input signals to the second memory. During the testing, first memory specific addresses are provided to the decoder as input. These first memory specific addresses are decoded by the decoder and are gated as input signals to address the first memory. In this way, the decoder which in normal operation provides decoded input signals to the CAM is used to provide input signals to the RAM, thus obviating the need for any scan chain latches surrounding the RAM. This enables conventional testing apparatus to provide the necessary test protocol for the RAM through the decoder normally used by the CAM.


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