The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 1998
Filed:
Apr. 22, 1996
William Todd Krein, San Jose, CA (US);
Charles M Flaig, Cupertino, CA (US);
James D Kelly, Aptos, CA (US);
Apple Computer, Inc., Cupertino, CA (US);
Abstract
A bus bridge circuit employs a dynamic allocation scheme that allows read transactions to be pipelined without deadlock and without the need for permanently reserving multiple buffer slots for read response transactions. The bus bridge circuit associates input and output buffers with a node and includes a state machine to monitor the number and type of transaction packets currently in slots that make up the buffers. In particular, the state machine monitors the number of transaction packets loaded in the output buffer slots, the number of outstanding read transactions for the node, and the number of read response transactions currently loaded in the output buffer. The state machine then allows the node to load a READ or WRITE transaction only if the monitored data indicates at least one of the buffer slots will be available to service a READ RESPONSE subsequently loaded by the node. The state machine launches READs to the node only when an unallocated buffer slot is available to service the corresponding READ RESPONSE.