The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 1998
Filed:
Mar. 06, 1995
Xiao Sun, Austin, TX (US);
Carmie A Hull, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
Verification Test Sequences (43) (VTS) are constructed for use in testing conformance of a Machine-Under-Test (14) (MUT) with a Finite State Machine (33) (FSM) model. The number of incoming and outgoing Test Subsequence (TS) graph (39) micro-edges are determined for each TS graph (39) vertex or Finite State Machine (33) state. An Augmented Graph (95) is created (40) by constructing Test Subsequence (TS) micro-edge bridging sequences between TS graph vertices with relatively more incoming micro-edges and vertices with relatively more outgoing micro-edges. The newly symmetric Augmented Graph (95) is Euler Toured (42), generating Verification Test Sequences (43), used to test a Machine-Under-Test (14) for conformance with the FSM model (33).