The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 1998
Filed:
Oct. 20, 1997
Robert Harrison Reed, Kokomo, IN (US);
Dennis Michael Koglin, Carmel, IN (US);
Mark Billings Kearney, Kokomo, IN (US);
Delco Electronics Corporation, Kokomo, IN (US);
Abstract
A memory cell having programming voltage margin verification is provided. The memory cell includes a voltage comparator having a differential input with first and second inputs and bias circuitry for generating a differential input voltage. A voltage offset is applied to the second input of the comparator to provide an input offset voltage. A programming voltage is received for programming the memory cell and the memory cell provides an output signal. To verify an unprogrammed state voltage margin of the memory cell, a margin detection circuitry receives a verification check signal and the output is monitored to determine whether the unprogrammed state voltage margin is proper. To verify a proper programmed state voltage margin of the memory cell, current is sensed through the programming input and a determination of a proper programmed state voltage margin is determined as a function of the sensed current.