The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 1998
Filed:
Jul. 23, 1996
Takanori Saeki, Tokyo, JP;
Yukio Fukuzo, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
In an interface for an input signal with a small amplitude and a high bit rate, the output voltage of a receiver can become more indeterminate when the input signal voltage at the receiving end of a signal transmission line becomes equal to a reference voltage V.sub.ref. In the input buffer circuit of the CMOS current mirror type, a transistor Q.sub.2 is connected in parallel with another transistor Q.sub.1, where the conductivity types of both the transistors are the same and a reference voltage V.sub.ref is applied to the gate electrode of the transistor Q.sub.1. The transistor Q.sub.2 endows the input buffer circuit with a hysteresis characteristic, and the output power N1 of the input buffer circuit is supplied to the gate electrode of the transistor Q.sub.2.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile