The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 1998
Filed:
Apr. 26, 1996
Noriyuki Yoshikawa, Osaka, JP;
Kunihiko Kanazawa, Kyoto, JP;
Satoshi Makioka, Shiga, JP;
Kazuki Tateoka, Osaka, JP;
Matsushita Electronics Corporation, Osaka, JP;
Abstract
A multilayer structure composed of a plurality of substrates stacked in layers is provided with a cavity formed by partially removing some of the substrates. A semiconductor chip internally provided with an active component such as an FET is mounted on the bottom face of the cavity. Passive components including a high-frequency matching circuit and a bias circuit are distributed in the uppermost layer, lowermost layer, and middle layer lying between the substrates of the multilayer structure. For example, a chip component partially composing the high-frequency matching circuit is disposed in the uppermost layer, while the bias circuit is disposed in the middle layer. Since only a reduced number of substrates underlie the semiconductor chip internally provided with the active component primarily serving as a heating element, an excellent heat dissipating ability is retained even when each of the substrates of the multilayer structure is composed of a versatile material such as alumina. By utilizing the characteristic, there can be implemented a high-frequency integrated circuit device exhibiting a high degree of integration and usable in mobile communication such as a portable telephone.