The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 1998

Filed:

Dec. 12, 1996
Applicant:
Inventors:

Satoshi Miyazaki, Saitama-ken, JP;

Shinji Tatara, Tokyo, JP;

Kosaku Ichikawa, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H / ;
U.S. Cl.
CPC ...
363 96 ; 363 58 ; 363 41 ; 363 65 ; 363 98 ;
Abstract

A neutral point clamped (NPC) inverter control system including a DC power source to output DC voltage having a neutral point, an NPC inverter to convert the DC voltage into AC voltage in three phases through a PWM control, a mode selecting unit to decide a first and a second PWM modes by comparing amplitude of voltage reference with a prescribed value that is defined by a minimum pulse width, a first voltage reference conversion means to add a prescribed bias value at which a polarity changes to positive/negative within a fixed period to secure the minimum pulse width to voltage references in respective phases in a first PWM mode, a second voltage reference conversion means to fix the voltage reference in one phase by a value that secures the minimum pulse width when voltage reference in one phase is smaller than a prescribed value that is defined by the minimum pulse width in a second PWM mode and correct voltage references of other two phases so as to make line voltage to a value corresponding to the voltage reference, and a modulation frequency change-over means to lower PWM control modulation frequency in the first PWM mode and to suppress power loss caused by switching in the first PWM mode.


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