The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 1998
Filed:
Jan. 28, 1997
Mitsuru Nagata, Kanagawa-ken, JP;
Mariko Terada, Yokohama, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
An amplifier and a semiconductor device according to the present invention are operated at a low voltage and decreased in size and problems such as a noise and an oscillation phenomenon. The amplifier and semiconductor device each includes a first bias generation circuit for generating first and second bias voltages when V1.gtoreq.V2, where V1 is the power supply voltage and V2 is the lower limit of the operation limiting voltage, and for outputting a zero potential when V1<V2, a first amplification circuit for amplifying an input signal by the first bias voltage and for opening an output terminal by the zero potential, a second amplification circuit of a push-pull type operated in response to the input signal and the output signal of the first amplification circuit, and a second bias generation circuit for supplying a bias current to the second amplification circuit by the zero potential when V2>V1.gtoreq.V3, where V3 (<V2) is a lower limit of the operation limiting voltage, and for opening the output terminal when V1.gtoreq.V2. The second amplification circuit performs a push-pull operation when V1.gtoreq.V2 and only one of push-pull transistors performs an amplification operation when V2>V1.gtoreq.V3.