The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 1998

Filed:

Dec. 15, 1995
Applicant:
Inventors:

Henry Chin, Wappingers Falls, NY (US);

John Edward Derrick, Milton, VT (US);

Christopher Michael Herring, Longmont, CO (US);

George Totolos, Jr, Wexford, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
711163 ; 711113 ; 711144 ; 711145 ; 711155 ; 711152 ;
Abstract

An apparatus and method are provided for maintaining lock characteristics while providing selective access to a cache during lock cycles. To guarantee that only one master accesses memory at a time, locked cycles are always passed to the internal arbitration unit of the memory controller, even if they are cache hits. If the local bus is not granted or cannot be guaranteed that it will be granted the bus for the locked cycle, the cycle is cancelled.


Find Patent Forward Citations

Chin, Henry. (1998). Bus protocol for locked cycle cache hit (U.S. Patent No. 5787486). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5787486

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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