The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 1998

Filed:

Aug. 21, 1996
Applicant:
Inventors:

Norman P Jouppi, Palo Alto, CA (US);

Ramsey W Haddad, Cupertino, CA (US);

Assignee:

Digital Equipment Corporation, Maynard, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
711117 ; 364D / ; 364D / ; 3642434 ; 711-3 ; 711118 ; 711146 ;
Abstract

A hierarchical memory arrangement for use with a processor includes a cache, addressable by source addresses, and a set of processor registers, addressable by destination addresses. For each processor register there is a miss status holding registers. If the cache does not store data requested for one of the processor registers, a miss condition is generated. In response to the miss condition, the address of a cache block to contain the missing data is stored in the miss status holding register corresponding to the processor register for which the data are requested. While the requested data are transferred from a main memory to the cache, the cache is not locked up and additional data accesses are allowed.


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