The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 1998

Filed:

Dec. 18, 1995
Applicant:
Inventors:

Glenn Henry, Austin, TX (US);

Terry Parks, Austin, TX (US);

Assignee:

Integrated Device Technology, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395181 ; 355387 ; 355571 ; 355591 ;
Abstract

An apparatus for locating exception correction routines within a control ROM of a microprocessor. A control ROM generates micro instructions that are addressable by a microprocessor. A translator generates micro instructions that do not have addresses which may be referenced. Error correction routines must be provided for micro instructions whether they are provided by a translator, or by a control ROM. Exception correction routines are stored in a control ROM at fixed offsets relative to the micro instructions for which they provide correction. For translator generated micro instructions, an address corresponding to an appropriate exception correction routine is provided to the control ROM and latched. This address may later be read from the latch should an exception condition occur.


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