The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 1998

Filed:

Jun. 07, 1996
Applicant:
Inventors:

Denis P Galipeau, Woonsocket, RI (US);

Jon A Rhan, Coventry, RI (US);

Assignee:

Cherry Semiconductor Corporation, East Greenwich, RI (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H / ;
U.S. Cl.
CPC ...
361 56 ; 361 58 ; 361111 ; 361115 ;
Abstract

A voltage clamp for protecting a load from transients in a supply line comprising pass transistors coupled to a bias circuit path. The bias circuit path determines the clamp turn-on voltage of the voltage clamp and comprises transistors configured as zener diodes and transistors configured as forward biased pn junctions. The pass transistors are coupled to the bias path so as to conduct current from the supply line to ground when the voltage drop across the bias circuit path reaches the clamp turn-on voltage. The collector-to-emitter voltage drops of the pass transistors during current conduction are equal to one another and sum up to the clamp turn-on voltage, and therefore, the pass transistors advantageously share equally the clamp turn-on voltage drop across their collector-to-emitter junctions. The bias circuit path is temperature compensated so that the clamp turn-on voltage is substantially independent of temperature. Additional bipolar transistors are coupled between the pass transistors and bias circuit path to supply bias current to the pass transistors so that negligible current is drawn from the bias path when the pass transistors are conducting current.


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