The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 1998

Filed:

Oct. 25, 1996
Applicant:
Inventors:

Howard C Kirsch, Taoyuan, TW;

Yen-Tai Lin, Hsinchu, TW;

Chiun-chi Shen, Hsinchu, TW;

Jiang-Hong Ho, Kaohsung, TW;

Jack-Lian Kuo, Tainan, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 27 ; 326 83 ;
Abstract

A circuit for the control of a power or ground distribution transient voltage or power bounce or ground bounce is described. The circuit has a driver transistor of a first conductivity type and a driver transistor of a second conductivity type connected so as to be able to transfer a voltage to a data output terminal from a I/O voltage distribution network or a I/O ground distribution network. As the output terminal changes from a logic 1 to a logic 0 the driver transistor of the first conductivity type will conduct and a ground distribution voltage transient will begin to appear. A suppression transistor of the first conductivity type that will begin to conduct to begin cessation of conduction of the driver transistor of the first conductivity type decreasing the slew rate of the driver transistor of the first conductivity type. As the output terminal changes from a logic 0 to a logic 1 the driver transistor of the second conductivity type will conduct and a power distribution voltage transient will begin to appear. A suppression transistor of the second conductivity type that will begin to conduct to begin cessation of conduction of the driver transistor of the second conductivity type decreasing the slew rate of the driver transistor of the second conductivity type. The transistors may be PMOS, NMOS, NPN bipolar, or PNP bipolar integrated upon a silicon or compound semiconductor substrate.


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