The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 1998
Filed:
Nov. 30, 1995
Harvey J Stiegler, Houston, TX (US);
Steven V Krzentz, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method for detecting defects between parallel rows of conductors (ROW) in an integrated-circuit array (ARR) includes (a) connecting all alternate rows (ROW) of conductors of the array (ARR) to a first voltage (V.sub.DD) and connecting the other alternate rows (ROW) of conductors of the array (ARR) to a second voltage (V.sub.REF) different from the first voltage, while measuring the current drawn; (b) if the current does not exceed a first limit, ending the process; (c) if the current exceeds the first limit, separately repeating step (a) on first and second halves of the array rather than all of the array, with all of the rows (ROW) of conductors of the half of the array (ARR) not under test connected to the second voltage (V.sub.REF); (d) if the current exceeds a second limit for a half of the array (ARR) in step (c), repeating step (a) on each quarter of the array (ARR) in that half with all of the rows (ROW) of the array (ARR) not under test connected to the second voltage V.sub.REF ; and (e) if the current exceeds a third limit for an array (ARR) quarter in step (d), continuing analogous steps for array (ARR) fractions divisible by two and for predetermined current limits until sufficient information concerning the defects is determined.