The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 1998

Filed:

May. 31, 1996
Applicant:
Inventors:

Yusuke Otomo, Kawasaki, JP;

Takeshi Mizusawa, Isehara, JP;

Tetsuro Komatsu, Tokorozawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H / ;
U.S. Cl.
CPC ...
361 56 ; 361111 ; 361118 ; 361127 ;
Abstract

A surge protection circuit including a first MOSFET and a second MOSFET connected in series. The drain of the first MOSFET is connected to the input terminal and the source of the second MOSFET is grounded. The gate of the second MOSFET is grounded, whereas the gate of the first MOSFET is connected to a high potential power supply terminal. This makes it possible to equalize the voltages applied to the two MOSFETs constituting the surge protection circuit, and weakens the intensity of the internal electric field of respective MOSFETs, thereby prolonging the lifetime of the surge protection circuit. The surge protection circuit is particularly effective in a SOI LSI.


Find Patent Forward Citations

Otomo, Yusuke. (1998). Semiconductor ic device including esd protection circuit (U.S. Patent No. 5784235). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5784235

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…