The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 1998
Filed:
Mar. 29, 1996
Janet M Flanner, Union City, CA (US);
Prashant Gadgil, Fremont, CA (US);
Linda N Marquez, Fremont, CA (US);
Adrian Doe, Pleasanton, CA (US);
Joel M Cook, Pleasanton, CA (US);
Lam Research Corporation, Fremont, CA (US);
Abstract
A method in a plasma processing chamber for fabricating a semiconductor device having a self-aligned contact. The method includes the step of providing a wafer having a substrate, a polysilicon layer disposed above the substrate, a nitride layer disposed above a polysilicon layer, and an oxide layer disposed above the nitride layer. The method further includes the step of etching in a first etching step partially through the oxide layer of the layer stack with a first chemistry and a first set of process parameters. In this first etching step, the first chemistry comprises essentially of CHF.sub.3 and C.sub.2 HF.sub.5. The method also includes the step of etching the oxide layer in a second etching step through to the substrate with a second chemistry comprising CHF.sub.3 and C.sub.2 HF.sub.5 and a second set of process parameters. The second set of process parameters is different from the first set of process parameters and represents a set of parameters for etching the oxide layer with a higher oxide-to-nitride selectivity than the oxide-to-nitride selectivity achieved in the first etching step.