The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 1998

Filed:

Aug. 13, 1996
Applicant:
Inventors:

Victor G Mycynek, Des Plaines, IL (US);

Leif W Otto, Des Plaines, IL (US);

Assignee:

Zenith Electronics Corporation, Glenview, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D / ; H03L / ; H03L / ;
U.S. Cl.
CPC ...
329325 ; 331 11 ; 331 14 ; 331 23 ; 331D / ; 455208 ; 455260 ;
Abstract

A biphase stable FPLL includes a lock switch, operated in response to a frequency lock condition, that forces a predetermined voltage on the input of the third multiplier to guarantee that the loop locks up in a phase that produces a desired polarity of demodulated signal. A frequency lock indicator operates the lock switch to force the predetermined voltage on the third multiplier irrespective of the actual lock up phase of the loop. If the lock up phase is wrong, the voltage reversal causes the VCO to slip 180.degree. in phase and the loop locks up in its other bistable state.


Find Patent Forward Citations

Mycynek, Victor. (1998). Circuit for causing fpll to lock in desired phase (U.S. Patent No. 5781065). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5781065

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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