The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 1998
Filed:
Feb. 13, 1996
Kin Shing Chan, Austin, TX (US);
Chiao-Mei Chuang, Cupertino, CA (US);
Sang Hoo Dhong, Austin, TX (US);
Alessandro Marchioro, Ferney-Voltaire, FR;
International Business Machines Corporation, Armonk, NY (US);
Abstract
A fast adder/subtracter using a decoder and shifting function instead of conventional full-adders is disclosed. The circuit is optimized for the addition of multiple operands up to 4-5 binary bits in magnitude. Using this method a subtraction operation can be performed at no added cost with respect to addition (compared to the conventional method requiring complementing one of the operands). Addition and subtraction of multiple operands is implemented by simple multiple shift operations. The multiple shift operations can be implemented as a chain of series NMOS pulldown devices with a precharged load providing considerable speed advantage over conventional solutions. Fast overflow detection may be implemented by or-ing the higher order bits in the shifter.