The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 1998

Filed:

Jul. 26, 1996
Applicant:
Inventor:

Xiao Feng Zhu, Fremont, CA (US);

Assignee:

Micronics Computers Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R / ;
U.S. Cl.
CPC ...
174263 ; 361792 ; 257700 ;
Abstract

Motherboard 10M receives a voltage at post 14P from an off-board power source. Buried conductive layer 10B selectively distributes this electrical power to component sites 10S. Post bore 14 penetrates through local electrodes 12U and 12L into the motherboard for exposing post contact regions 14U and 14L and post contact region 14B in the buried layer. Connector post 14P is positioned within the post bore. Post bore conductor 14C within the post bore establishes electrical continuity from the connector post to the buried layer. The post bore conductor also establishes electrical continuity from the connector post to post contact regions 14U and 14L in the local electrodes. Auxiliary bore 16 proximate the post bore penetrates into the motherboard for exposing auxiliary contact regions 16U and 16L in the local electrodes, and auxiliary contact region 16B in the buried layer. Auxiliary bore conductor 16C within the auxiliary bore establishes electrical continuity along the auxiliary bore. Each auxiliary bore provides an upper circuit and lower auxiliary circuit in parallel relationship between the connector post and the buried layer for reducing the electrical resistance into the buried layer from the off-board power supply.


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