The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 1998
Filed:
Aug. 08, 1995
Wolfram Zirngibl, Schalbach, DE;
U.S. Phillps Corporation, New York, NY (US);
Abstract
A serial/parallel converter includes a shift register arrangement (12', 12' to 12.sup.n) and an output register arrangement (13', 13' to 13.sup.n), each of which includes n storage devices (12', 12' to 12.sup.n ; 13', 13' to 13.sup.n). Each of the storage devices (13', 13' to 13.sup.n) of at least the output register arrangement includes two data inputs (DP, DS), a selection input (S) for selecting a data input, a clock input (CLK) as well as a data output (Q). The individual clock inputs (CLK) of the storage devices (13', 13' to 13.sup.n) receive a serial data signal and the selection inputs (S) receive a frequency-divided clock signal. Second data inputs (DS) of the storage devices (13', 13' to 13.sup.n) are connected to the data outputs (Q) of the shift register arrangement (12', 12' to 12.sup.n), the first data input (DP) of said storage devices being connected to the own data output (Q). The data signal can be derived in parallel from the data outputs (Q) of the storage devices (13', 13' to 13.sup.n).