The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 1998

Filed:

Aug. 08, 1995
Applicant:
Inventors:

Sung Chul Lee, Chungcheongbuk-do, KR;

Min Gyu Lim, Chungcheongbuk-do, KR;

Assignee:

LG Semicon Co., Ltd., Chungcheongbuk-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438259 ; 438589 ;
Abstract

A semiconductor device having a recessed channel structure which has a semiconductor region positioned at a level above a channel region, including a first conduction type substrate having a channel region therein, a second conduction type semiconductor region formed on the substrate excluding the channel region, a first insulation film formed on the semiconductor region, a second insulation film formed on a surface between the channel region and the semiconductor region, a first gate formed on a gate insulation film on the channel region, and a dielectric film formed between the first gate and the first insulation film. Also, a method for fabricating a semiconductor device having a recessed structure, including the steps of: forming a second conduction type polysilicon film on a first conduction type substrate; forming a first insulation film on the polysilicon film; forming a semiconductor layer by etching the first insulation film and the underlying polysilicon film; forming a second insulation film on an exposed surface of the substrate between the semiconductor layer and at sides of the semiconductor layer and the first insulation film; forming a first gate on the second insulation film; forming a dielectric film on a surface between the first gate and the second insulation film; and forming a second gate on the dielectric film.


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