Method for forming ultra-shallow junction of semiconductor device

Abstract

There is disclosed a method for forming an ultra-shallow junction of a semiconductor device, comprising a four-stage RTA process following the ion implantation of dopants for source/drain junction, the RTA process being carried out with high temperature-elevating and -quenching rates between the stages, in such a way that relatively low temperatures are used for a short time in the first three stages in order to eliminate only the point defects, which greatly affect the diffusion of dopants, without diffusion of dopants while a relatively high temperature is taken in the last stage with the aim of allowing the dopants to diffuse a little to p.sup.+ and n.sup.+ shallow junctions, thereby obtaining an improvement in electrical activity and reducing junction current leakage and thus, improving the properties and reliability of the resulting semiconductor device.