The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 1998
Filed:
Nov. 01, 1995
Hideki Ando, Hyogo, JP;
Mitsubishi Denki Kabushiki Kaishi, Tokyo, JP;
Abstract
A processing device executes an instruction speculatively, and execution result of the instruction becomes valid when all the predictions about true/false of branch condition are correct, and the instruction has a commit condition indicating the number of branch conditions. The processing device includes a commit condition decoder for decoding the commit condition; ALU's; a sequential register file for sequentially holding data obtained from ALU; a shadow register file for speculatively holding data obtained from the ALU; true/false register having determination entries, each of which holds undetermined information if true/false of the corresponding branch condition is not yet determined, holds true information if the corresponding branch condition is true, and holds false information if the corresponding branch condition is false; execution control circuit for comparing true/false of an instruction decode entry provided from the commit condition decoder with true/false of the determination entry and controlling the sequential register file to sequentially hold data if they correspond with each other or otherwise controlling the shadow register file to speculatively hold data; and a commit control circuit for comparing true/false of the instruction decode entry with true/false of the determination entry and transferring the data held in the shadow register file to the sequential register file if each true/false of the instruction decode entry coincides with true/false of the corresponding determination entry.