The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 1998

Filed:

Oct. 12, 1995
Applicant:
Inventors:

Steven Lan, Fremont, CA (US);

David H Miller, Sacramento, CA (US);

Richard W Koralek, Palo Alto, CA (US);

Assignee:

Adaptec, Inc., Milpitas, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; H03M / ;
U.S. Cl.
CPC ...
3647461 ; 371 371 ;
Abstract

An integrated circuit for error correction takes advantage of a novel data representation ('tower representation') for a selected finite Galois field. Using this representation, novel circuits which utilize the hierarchical structures in the subfields of the selected finite Galois field can be constructed. In one embodiment, GF(256) multipliers, GF(256) multiplicative inverse circuits, GF(256) logarithm circuits can be constructed out of GF(16) multipliers, GF(16) multiplicative inverse circuits and other GF(16) components. These GF(16) components, in turn, can be constructed from still simpler GF(4) components. In that embodiment, a user-programmable burstlimiter is provided. In that embodiment also, a novel quadratic equation solver is provided.


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