Method of fabricating a field effect transistor with short gate length

Abstract

On a silicon substrate in which boron (B) has been introduced, an n.sup.+ polysilicon film and a tungsten silicide film are sequentially deposited, with a gate oxide film being interposed between the substrate and the polysilicon film, to form a gate electrode. A sidewall of p.sup.+ polysilicon is formed at each side of said gate electrode. A source/drain diffusion layer of an n.sup.+ region is self-aligned with a side edge portion of the gate electrode including the sidewall. The formation of the sidewall is performed after the source/drain diffusion layers have been formed using a dummy sidewall. The gate structure thus formed has a steep potential gradient in the lateral direction of channel region. In the field effect transistor thus formed, the short channel effect is efficiently suppressed.