The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 1998
Filed:
Jan. 29, 1996
Asit Dan, West Harrison, NY (US);
Martin G Kienzle, Somers, NY (US);
Dinkar Sitaram, Yorktown Heights, NY (US);
William H Tetzlaff, Mount Kisco, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method are provided for determining load capacity of a system. Physical components of the system and their interconnection are identified. The physical components are converted into logical components such that at least one logical component is created by grouping a plurality of the physical components and such that a load on the logical component will result in an approximately fixed proportional load on the plurality of physical components. Links between the logical components and a proportion of the load placed on each link between a source and destination pair are determined. A model of the logical components and interconnection of the logical components in is then stored in an electronically accessible data structure formed in a memory. A system and method for determining a path for routing data between a source and a destination pair in a system are also provided. An interconnection model of logical system components and logical links is provided wherein the model reflects the saturation capacity of each of the logical system components and each of the logical links. The bandwidth required for providing the data is determined. Then, by reference to the model, a path between the source and destination pair is selected that would not saturate any of the logical system components and logical links when providing the data. System capacity is then reserved by altering the model to reflect the load on the system components that would be required by providing the data from the source to the destination by way of the selected path.