The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 1998
Filed:
Mar. 01, 1996
Raymond E Bloker, San Jose, CA (US);
Andrew L Hawkins, Starkville, MS (US);
Stefan P Sywyk, San Jose, CA (US);
Cypress Semiconductor Corp., San Jose, CA (US);
Abstract
A FIFO (First-In-First-Out) memory includes a main memory array and a main select circuit having a plurality of serially coupled shift registers, each selecting at least one memory location of the main memory array. The FIFO memory also includes a redundant memory array and a redundant select circuit having a plurality of redundant shift registers, each selecting at least one redundant memory location of the redundant memory array. A switching circuit is provided in the FIFO memory that is coupled to each of the shift registers and each of the redundant shift registers. When a memory location of the main memory is found defective, the switching circuit causes a corresponding shift register of the shift registers to be bypassed in the main select circuit and a redundant shift register of the redundant shift registers to be serially coupled into the main select circuit via a last one of the shift registers.