Method and apparatus for self-throttling video fifo

Abstract

A method and an apparatus for writing display data to and reading display data from a FIFO. In one embodiment of the present invention, a memory controller coupled to a memory is configured to retrieve display data from the memory and write the retrieved data to a FIFO. The memory controller retrieves the display data from the memory in response to a FIFO write signal received from an output display controller. The output display controller is further configured to generate a FIFO read signal which is received by the FIFO. In response to the FIFO read signal, display data entries are sequentially read from the FIFO and transferred to an output display. The present invention features a programmable memory circuit such as a register, configured to store the value pointing to a particular display data entry in the FIFO. When the particular display data entry is read, a subsequent FIFO write signal is issued to the memory controller. The value stored in the programmable memory circuit is chosen to minimize the occurrences of overflow and underflow conditions in the FIFO. In addition, the present invention features a self-adjusting, or self-throttling aspect which provides the present invention with the capability to dynamically adapt to different computer system configurations having different system clock and video clock frequencies.