The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 1998

Filed:

Jul. 25, 1996
Applicant:
Inventors:

Shinichi Osera, Yokohama, JP;

Yukihiro Saeki, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327295 ; 327161 ; 327292 ;
Abstract

A clock signal generated by a clock signal generating circuit is supplied to a frequency-dividing circuit formed using a D-type flip-flop circuit, being supplied to a controlled circuit after being divided down. Furthermore, the clock signal generated by the clock signal generating circuit is supplied to the controlled circuit by way of a through circuit having signal-delay-quantity substantially equivalent to signal-delay-quantity of the frequency-dividing circuit, the through circuit being formed using the D-type flip-flop circuit in the same way as the frequency-dividing circuit.


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