The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 1998
Filed:
Mar. 28, 1996
Applicant:
Inventor:
Tom Edsall, Mountain View, CA (US);
Assignee:
Cisco Technology, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
370401 ; 370256 ; 370400 ;
Abstract
A color blocking logic (CBL) mechanism implements spanning tree states with respect to data frames transported between port interface circuitry over a link connecting different switches in a network. Each port interface circuit preferably supports multiple virtual local area network (VLAN) designations and associates those VLAN designations with data frames transmitted to and from the switch over the link. The CBL mechanism cooperates with a forwarding engine of the switch to selectively enable the port interface circuit to receive certain VLAN-designated frames, and to discard others, in an efficient and cost-effective manner.