The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 1998

Filed:

Jul. 01, 1996
Applicant:
Inventors:

Paul Raj Findley, Cupertino, CA (US);

Morgan Smith, San Francisco, CA (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F / ;
U.S. Cl.
CPC ...
257775 ; 257773 ; 364490 ; 364491 ; 430311 ; 430313 ; 430318 ; 430312 ;
Abstract

A metal layer on an integrated circuit includes active signal lines and fill metal segments. The fill metal segments are polygons. Each fill metal segment at its narrowest has a width which is not greater than 1.25 times a design rule metal pitch for a technology used to fabricate the integrated circuit. In addition, each fill metal segment is separated from every other fill metal segment by spacing which is at least 0.7 times the design rule metal pitch for the technology used to fabricate the integrated circuit. Also, each fill metal segment is separated from every active signal line by spacing which is at least 0.5 times the design rule metal pitch for the technology used to fabricate the integrated circuit.


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