The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 1998

Filed:

May. 25, 1993
Applicant:
Inventors:

Pierre Huon, Saint Laurent du Var, FR;

Rene Glaise, Nice, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
711167 ; 395559 ;
Abstract

A circuit arrangement synchronizes data transfers between a first device and a second device operating at different data rates. The circuit arrangement is comprised of a plurality of registers for storing data received from a device with the higher data rate. A scan logic circuit counts strobe pulses provided by the device with the higher data rate when data is available on its output bus. Selected counts from the scan logic circuit cause data on the output bus to be sequentially transferred into the plurality of registers. Strobe latch logic keeps track of the loading sequence and, in response thereto, select logic and gate arrangement causes the content of a selected register to be transferred to an output register at each clock signal of the slower device.


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