The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 1998
Filed:
Feb. 06, 1995
Edward C King, Pleasanton, CA (US);
Alan G Smith, Dublin, CA (US);
James C Lee, San Francisco, CA (US);
CPU Technology, Inc., Fremont, CA (US);
Abstract
A parallel processing system is provided with a plurality of processors and a plurality of memories, and bus units with arbitration coupling the processors and memories. A bus unit provides a pathway between one processor and the bus unit's respective memory. Each bus unit arbitrates multiple simultaneous access requests for its respective memory and communicates its decisions to other bus units so that a memory access requiring multiple memories will only occur if all those memories are available. The coupling of processors to memories can change, dynamically, each bus cycle without the need for setup before the bus cycle either by pipelining or having unused bus cycles. In a specific embodiment, the memory access information is provided on high order address lines, where the processor logically accesses different memory address spaces to make different accesses, thereby sharing memory with other processors.