The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 1998

Filed:

Jan. 22, 1997
Applicant:
Inventor:

Seungug Koh, Bellbrook, OH (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B / ;
U.S. Cl.
CPC ...
385 14 ;
Abstract

Optoelectronic interconnections can provide a practical solution for the ever increasing communication bottleneck problems when combining a multitude of information processing units to perform a function. As research activities progress in the field of serial or parallel board-to-board and module-to-module interconnections, some of the research focus has shifted to smaller physical dimensions, like intra-module interconnections, which combines optoelectronic interconnections, multichip module packaging, and microelectromechanical system (MEMS) technologies at the module level. The present invention provides integrated optical input/output (I/O) couplers on multichip modules (MCMs) using micro-machined silicon mirrors that are used with optoelectronic multichip modules (OE-MCMs). The present invention used microstructures that integrate optical waveguide networks, multilayer electrical transmission line networks, micro-machined silicon mirrors, and C4-bonded photonic devices into a single structure. Using both sides of the silicon wafers, multiple metal layers and optical waveguide layers are fabricated for all types of metal or optical waveguide materials. The input/output coupling arrangement utilizes a combination of micro-machined silicon mirrors and through-holes across OE-MCM, integrated together into a single package. Fabrication strategies and possible applications of the invention are disclosed herein.


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