The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 1998
Filed:
Nov. 22, 1995
William F DeCamp, Burlington, VT (US);
John J Ellis-Monaghan, Grand Isle, VT (US);
Peter A Habitz, Hinesburg, VT (US);
Edward W Seibert, Richmond, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
According to the present embodiment, a method for calculating the parasitic capacitance in a semiconductor device is disclosed. According to the preferred method, a layout file containing the shapes of a semiconductor device is provided. The dimensions of the layout file are then adjusted to wafer dimensions so as reflect actual production devices. The shapes of the layout file are then partitioned into simpler shapes, typically abutted rectangles, called tiles. Each tile is then decomposed into overlap and fringe capacitance components, each component having a uniform capacitance environment with respect to its capacitance elements. The parasitic capacitance of the semiconductor device can thus be accurately computed, with an efficient use of resources. Additionally the preferred embodiment is easily adaptable to a wide range of technology types.