The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 1998
Filed:
Jul. 16, 1996
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A semiconductor device includes an Si substrate, a stress absorbing layer of GaAs and disposed on the Si substrate, a buffer layer having a composition of Al.sub.x Ga.sub.1-x-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) and disposed on the stress absorbing layer, and a compound semiconductor layer having a composition of Al.sub.x Ga.sub.1-x-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) and disposed on the buffer layer. Therefore, the buffer layer protects the GaAs stress absorbing layer from high temperatures during the formation of the compound semiconductor layer, whereby the stress absorbing layer is prevented from decomposition. As a result, a stress due to lattice mismatch or thermal stress between the Si substrate and the compound semiconductor layer is absorbed in the GaAs stress absorbing layer having a lowest bulk modulus, whereby a compound semiconductor layer with reduced dislocations may be grown on the buffer layer and bending of the Si substrate prevented.