The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 1998
Filed:
Jun. 07, 1995
Timothy Michael Damron, Austin, TX (US);
Michael Edward Lyons, Round Rock, TX (US);
Leslie James Record, Round Rock, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and system are disclosed for managing multiple requests issued by a requester to a number of peripheral devices coupled to a peripheral bus within a data processing system. A request issued by the requestor which specifies a particular operation to be performed is transmitted to a selected peripheral device vice the peripheral bus. In response to performance of the particular operation by the selected peripheral device within a first predetermined time period, successful completion of the request is reported to the requestor. In response to a failure of the selected peripheral device to perform the particular operation within the first predetermined time period, access to the peripheral bus by the multiple requests is limited. Thereafter, in response to a failure of the selected peripheral device to perform the particular operation within a second predetermined time period, a request timeout error is reported to the requester. However, in response to performance of the particular operation by the selected peripheral device within the second predetermined time period, successful completion of the request is reported to the requester. Thus, utilizing the present invention, request timeout errors due to peripheral bus saturation are minimized.