The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 1998

Filed:

Nov. 30, 1995
Applicant:
Inventor:

Brendan P Kelly, Stockport, GB;

Assignee:

U. S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327434 ; 327372 ; 327427 ; 323292 ; 323266 ; 361 90 ; 361 91 ;
Abstract

A protected switch has a power first semiconductor device having a first main electrode for coupling to a first voltage supply line, a second main electrode coupled to a first terminal for connection via a load to a second voltage supply line and an insulated gate electrode coupled to a control terminal for supplying a gate control signal to enable conduction of the power semiconductor device. A control arrangement has a normally off second semiconductor device having first and second main electrodes coupling the normally off semiconductor device between the gate electrode of the power semiconductor device and one of the first and second main electrodes of the power first semiconductor device and a control electrode coupled via a resistance to the gate electrode of the power semiconductor device thereby causing the normally off semiconductor device to be rendered conducting when a gate control signal is supplied to the gate electyrode to enable conduction of the power semiconductor device. A disabling arrangement including a normally off third semiconductor device inhibits conduction of the normally off semiconductor device during normal operation of the power semiconductor device.


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