Programmable circuitry for the generation of precision low noise clock

Abstract

A Clock and Bias Module (CBM 10) includes a low pass filter speed-up switch (U104, U114) to provide both a long time constant and fast settling; bootstrapped power supplies (VR101-104) to provide a wide, programmable output voltage range with overload protection; an integrating output driver (20) to provide controlled clock slew rates while maintaining a precision rail voltage; an active current steering bridge (Q5, Q6, CR1, CR2) to allow computer programmable control of slew rates; a current measurement circuit (U14, U15, U19) that enables sensing an average load current in the presence of large voltage swings; and a compact modular implementation that allows for close proximity of the circuitry to a unit under test. The CBM provides IR Detector FPA electrical stimulus in an automated testing environment. The clock generation circuitry is fully programmable for rail voltage, rising slew rate, and falling slew rate. Actual rail voltages, load currents, and the internal operating temperature may be measured and read by the host computer. The clock switching circuit provides controlled slew rates over a wide range (e.g., from 5 to 500 V/.mu.s) without compromising the DC accuracy and stability of the clock rails. Voltage swings may be programmed from, by example, 0 to 30 volts within a .+-.15 volt range. Outputs may be shorted to ground, to each other, or to a voltage of up to .+-.16 volts without damage. A presently preferred embodiment provides four clock channels or eight bias channels per CBM.