The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 1998

Filed:

Jan. 14, 1997
Applicant:
Inventors:

Steven J Tanghe, Essex Junction, VT (US);

Gregg R Castellucci, Plattsburgh, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 77 ; 360 67 ; 326 63 ;
Abstract

A circuit for converting received input signals to highly symmetrical CMOS level outputs having fast slew rates. The circuit can accept a differential input signal with a wide range of common mode voltages. A first stage level shifts the input signals to provide a ground-based common mode output to a second stage level shifter which centers the input signals around the midpoint between V.sub.cc and ground and which increases their voltage swing. The final stage provides a full, highly symmetric, rail-to-rail output capable of driving highly capacitive loads at high rates and which is immune to temperature, V.sub.cc, and process variations.


Find Patent Forward Citations

Tanghe, Steven. (1998). Multi-stage ecl-to-cmos converter with wide dynamic range and high (U.S. Patent No. 5754059). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5754059

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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